VHDL implementation of transceiver, job parser and hardware accelerator modules

subDesTagesMitExtraKaese b375af81d0 changed src paths 5 anni fa
ip_repo_sources b375af81d0 changed src paths 5 anni fa
sources b375af81d0 changed src paths 5 anni fa
vivado-git @ 6fdeefa9c3 25f53b2c2a added vivado-git 5 anni fa
.gitignore 25f53b2c2a added vivado-git 5 anni fa
.gitmodules 2c5882b1f0 init 5 anni fa
README.md 2c5882b1f0 init 5 anni fa
RepoVivadoVersion 2c5882b1f0 init 5 anni fa
checkin.pl b375af81d0 changed src paths 5 anni fa
checkout.pl b375af81d0 changed src paths 5 anni fa
condor_build.pl b375af81d0 changed src paths 5 anni fa
projects.list b375af81d0 changed src paths 5 anni fa

README.md

modules-vhdl-ip

VHDL implementation of job parser and hardware accelerator modules