VHDL implementation of transceiver, job parser and hardware accelerator modules

subDesTagesMitExtraKaese 7dad3517dd added sources 5 lat temu
ip_repo_sources 7dad3517dd added sources 5 lat temu
sources 7dad3517dd added sources 5 lat temu
vivado-git @ 6fdeefa9c3 25f53b2c2a added vivado-git 5 lat temu
.gitignore 25f53b2c2a added vivado-git 5 lat temu
.gitmodules 2c5882b1f0 init 5 lat temu
README.md 2c5882b1f0 init 5 lat temu
RepoVivadoVersion 2c5882b1f0 init 5 lat temu
checkin.pl 2c5882b1f0 init 5 lat temu
checkout.pl 2c5882b1f0 init 5 lat temu
condor_build.pl 2c5882b1f0 init 5 lat temu
projects.list 7dad3517dd added sources 5 lat temu

README.md

modules-vhdl-ip

VHDL implementation of job parser and hardware accelerator modules